📚 IGCSE Computer Science: Logic Gates Exam Guide | IGCSE 计算机：逻辑门考点精讲
Logic gates are the building blocks of digital circuits. They take one or more binary inputs and produce a single binary output based on a logical rule. Understanding how they work, how to combine them, and how to interpret truth tables and Boolean expressions is essential for the IGCSE Computer Science exam.
逻辑门是数字电路的基础构件。它们接收一个或多个二进制输入，并根据逻辑规则产生一个二进制输出。理解它们的工作原理、如何组合、如何解读真值表和布尔表达式，对 IGCSE 计算机科学考试至关重要。
1. What are Logic Gates? | 什么是逻辑门？
A logic gate is an electronic component that performs a Boolean function on binary inputs. In IGCSE, we work with two states: 0 (false, off, low voltage) and 1 (true, on, high voltage). Each gate has a unique symbol and a truth table that defines its behaviour for every possible input combination.
逻辑门是一种对二进制输入执行布尔函数的电子元件。在 IGCSE 课程中，我们使用两种状态：0（假、关、低电压）和 1（真、开、高电压）。每个门都有独特的符号和真值表，真值表定义了所有可能输入组合下的输出行为。
There are six fundamental gates you must know: NOT, AND, OR, NAND, NOR, and XOR. The XNOR gate (exclusive NOR) is sometimes introduced as an extension. In practice, all complex digital circuits—from adders to memory units—are built by connecting these basic gates.
你必须掌握六种基本门：非门（NOT）、与门（AND）、或门（OR）、与非门（NAND）、或非门（NOR）和异或门（XOR）。同或门（XNOR）有时会作为拓展出现。实际上，所有复杂的数字电路（从加法器到存储单元）都由这些基本门连接构成。
2. The NOT Gate | 非门
c level: if the input is 1, the output is 0, and vice versa. Its Boolean expression is Q = ¬A or Q = A'.
非门（反相器）只有一个输入端。它输出相反的逻辑电平：若输入为 1，则输出 0；反之亦然。其布尔表达式为 Q = ¬A 或 Q = A'。
Truth table:
真值表：
| A | Q = ¬A |
|---|---|
| 0 | 1 |
| 1 | 0 |
In exam questions, a NOT gate is often drawn as a triangle with a small circle (bubble) at its output. The bubble indicates inversion.
在考题中，非门常画为一个三角形，输出端有一个小圆圈（气泡），表示反相。
Example: A temperature alarm sends a 0 when it is too hot. A NOT gate can invert this to 1, lighting an LED when the alarm is active.
示例：温度报警器在过热时发送 0。非门可将其反相为 1，在报警激活时点亮 LED。
3. The AND Gate | 与门
The AND gate outputs 1 only when all its inputs are 1. For a two‑input AND, the Boolean expression is Q = A · B (sometimes written as AB or A ∧ B).
与门仅在所有输入均为 1 时才输出 1。对于两输入与门，布尔表达式为 Q = A · B（有时写作 AB 或 A ∧ B）。
Truth table (2‑input):
真值表（两输入）：
| A | B | Q = A·B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
AND gates are used when several conditions must be true at the same time. For instance, a car's ignition circuit might use an AND gate to start the engine only if the key is turned AND the brake pedal is pressed.
当需要多个条件同时为真时，使用与门。例如，汽车点火电路可能使用与门，仅在钥匙转动且刹车踏板被踩下时才启动发动机。
4. The OR Gate | 或门
gives an output of 1 if at least one input is 1. The Boolean expression is Q = A + B (or A ∨ B).
或门在至少一个输入为 1 时输出 1。布尔表达式为 Q = A + B（或 A ∨ B）。
Truth table:
真值表：
| A | B | Q = A+B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
Notice that the output is 1 for any input except (0,0). An OR gate can model a burglar alarm that sounds when a front door sensor OR a window sensor goes high.
请注意，除 (0,0) 外，任何输入下输出都为 1。或门可以模拟防盗报警器，当前门传感器或窗户传感器变高电平时发出警报。
5. The NAND and NOR Gates | 与非门和或非门
The NAND gate (NOT‑ the complement of AND. Its output is 0 only when all inputs are 1. Boolean expression: Q = ¬(A · B). The NOR gate (NOT‑OR) outputs 1 only when all inputs are 0; Q = ¬(A + B).
与非门（NAND）是与门的补。仅在所有输入为 1 时输出 0。布尔表达式：Q = ¬(A · B)。或非门（NOR）仅在所有输入为 0 时输出 1；Q = ¬(A + B)。
These two gates are called 'universal gates' because any other logic function can be built using only NAND gates or only NOR gates. For the IGCSE, you should be able to recognise and complete their truth tables and draw simple circuits with them.
这两个门被称为“全能门”，因为仅用与非门或仅用或非门就能搭建任何其他逻辑函数。在 IGCSE 中，你应该能够识别并填写它们的真值表，以及用它们绘制简单电路。
NAND truth table:
与非门真值表：
| A | B | Q = ¬(A·B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NOR truth table:
或非门真值表：
| A | B | Q = ¬(A+B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
6. The XOR and XNOR Gates | 异或门和同或门
1. For two inputs, it means the inputs must be different. The Boolean expression is Q = A ⊕ B. The XNOR (exclusive NOR) is its complement: Q = ¬(A ⊕ B), giving 1 when the inputs are equal.
异或门（XOR）仅在输入中 1 的个数为奇数时输出 1。对于两输入情况，意味着两个输入必须不同。布尔表达式为 Q = A ⊕ B。同或门（XNOR）是其补：Q = ¬(A ⊕ B)，当输入相等时输出 1。
XOR truth table:
异或门真值表：
| A | B | Q = A⊕B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
In the exam, XOR often appears in half‑adder and full‑adder circuits, where it generates the sum bit. XNOR can be used as an equality detector.
在考试中，异或门常出现在半加器和全加器电路中，用于产生和位。同或门可用作相等检测器。
7. Truth Tables | 真值表
A truth table lists every possible input combination and the corresponding output for a logic circuit or expression. For n inputs, there are 2ⁿ rows. In IGCSE, you will frequently be asked to complete a truth table, deduce the Boolean function from a given table, or check whether two expressions are equivalent.
真值表列出了逻辑电路或表达式的所有可能输入组合及其对应输出。对于 n 个输入，有 2ⁿ 行。在 IGCSE 中，你常会被要求填写真值表、根据给定表格推断布尔函数，或检查两个表达式是否等价。
When constructing a truth table, always list inputs in binary counting order (e.g., 00, 01, 10, 11). Work column by column, evaluating intermediate signals if the circuit contains several gates.
构建真值表时，始终按二进制计数顺序列出输入（如 00、01、10、11）。如果电路包含多个门，应逐列计算中间信号。
8. Logic Expressions and Boolean Algebra | 逻辑表达式与布尔代数
A Boolean expression shows the logical relationship between inputs using operators such as AND (·), OR (+), and NOT (¬ or overbar). IGCSE questions often ask you to write the expression for a given logic diagram, or to simplify an expression using Boolean algebra rules.
布尔表达式使用与（·）、或（+）、非（¬ 或上划线）等运算符表示输入之间的逻辑关系。IGCSE 题目常要求你根据给定逻辑图写出表达式，或使用布尔代数规则化简表达式。
Key Boolean laws to remember:
需记住的关键布尔定律：
- Commutative: A · B = B · A; A + B = B + A
- Associative: A · (B · C) = (A · B) · C; A + (B + C) = (A + B) + C
- Distributive: A · (B + C) = (A · B) + (A · C); A + (B · C) = (A + B) · (A + C)
- Identity: A · 1 = A; A + 0 = A
- Annulment: A · 0 = 0; A + 1 = 1
- Complement: A · ¬A = 0; A + ¬A = 1
- Double negation: ¬(¬A) = A
- Idempotent: A · A = A; A + A = A
Understanding these laws helps you simplify circuits and prove equivalence—a skill frequently tested with truth tables and algebraic manipulation.
理解这些定律有助于简化电路和证明等价性，这是考试中常结合真值表和代数运算来考查的技能。
9. Drawing Logic Circuits | 绘制逻辑电路
In the exam, you may need to sketch a logic circuit from a Boolean expression or a problem description. Use the standard gate symbols recognised by Cambridge IGCSE. Always label inputs and the final output. If the expression has multiple layers, break it down: draw gates for the innermost operations first, then connect them step by step.
在考试中，你可能需要根据布尔表达式或问题描述画出逻辑电路。应使用剑桥 IGCSE 认可的标准门符号。务必标出输入和最终输出。如果表达式有多层嵌套，先画最内层运算的门，然后逐步连接起来。
For example, Q = (A · B) + ¬ an AND gate with inputs A and B, a NOT gate on C, and an OR gate combining their outputs.
例如，Q = (A · B) + ¬C 应画成一个输入为 A、B 的与门，一个对 C 进行取反的非门，以及一个将这两个输出结合起来的或门。
When drawing, keep the signal flow left to right. Avoid crossing wires unless necessary, and use a dot to indicate a connection if wires join.
绘图时，保持信号从左到右流动。除非必要，避免交叉连线；若连线相交且连接，需用圆点标明连接点。
10. Combining Logic Gates | 组合逻辑门
Real‑world problems require combining several gates to make decisions. IGCSE scenarios might include: a bank vault that opens only when two senior staff present their keys AND it is within working hours (using AND and OR); or a heating system that turns on if the temperature is low OR the timer is active, but NOT both (XOR).
实际问题需要组合多个门来做判断。IGCSE 场景可能包括：银行金库只在两位高级职员出示钥匙且在工作时间内才打开（使用与门和或门）；或者供暖系统在温度低或定时器激活时启动，但不能两者同时为真（异或门）。
You must be able to read a mixed‑gate diagram, produce its truth table, and write the final expression. Start by annotating the output of each gate, then substitute into the next stage until you reach Q.
你必须能够阅读混合门电路图，制作其真值表并写出最终表达式。方法是从每个门的输出开始标注，然后逐级代换，直到得到 Q。
e: A circuit has inputs X, Y. Gate1 is an AND producing P = X·Y. Gate2 is a NOT giving Q = ¬Y. Gate3 is an OR combining P and Q, so final output R = (X·Y) + (¬Y). From the truth table, you can simplify it or implement it using fewer gates.
示例：电路有输入 X、Y。门 1 为与门，产生 P = X·Y。门 2 为非门，输出 Q = ¬Y。门 3 为或门，组合 P 和 Q，最终输出 R = (X·Y) + (¬Y)。通过真值表，你可以将其化简或用更少的门实现。
11. De Morgan's Laws | 德摩根定律
De Morgan's laws are powerful tools for transforming logic expressions and are often tested in IGCSE. They state:
德摩根定律是变换逻辑表达式的重要工具，在 IGCSE 中经常考查。定律内容为：
¬(A · B) = ¬A + ¬B
¬(A + B) = ¬A · ¬B
In words: the complement of a conjunction is the disjunction of the complements, and vice versa. These laws explain why a NAND gate is equivalent to an OR gate with inverted inputs, and a NOR gate is equivalent to an AND gate with inverted inputs.
通俗地说：与运算的补等于各变量补的或运算，反之亦然。这些定律解释了为什么与非门等同于输入反相后的或门，或非门等同于输入反相后的与门。
When simplifying circuits, applying De Morgan's laws can reduce the number of gates or convert a design to use only NAND or only NOR gates—a common requirement in digital engineering.
在化简电路时，应用德摩根定律可以减少门数量，或将设计转换为仅使用与非门或仅使用或非门——这是数字工程中的常见要求。
12. Logic Gates in Computing | 逻辑门在计算中的应用
Understanding logic gates goes beyond the exam—they are the foundation of all modern computers. The CPU's Arithmetic Logic Unit (ALU) uses gates to perform operations like addition and comparison. Flip‑flops, built from NAND or NOR gates, store one bit of memory and form the basis of registers and RAM.
理解逻辑门不仅为了考试，它们还是所有现代计算机的基础。CPU 的算术逻辑单元（ALU）使用门来执行加法和比较等操作。由与非门或或非门构成的触发器可存储一位数据，构成寄存器和 RAM 的基础。
In IGCSE, you may encounter half‑adder and full‑adder circuits. A half‑adder uses an XOR for sum and an AND for carry, adding two 1‑bit numbers. A full‑adder extends this by including a carry‑in input, using two XORs, two ANDs, and an OR gate.
在 IGCSE 中，你可能会遇到半加器和全加器电路。半加器使用异或门产生和位，用与门产生进位，将两个 1 位数字相加。全加器则在此基础上加入进位输入，使用两个异或门、两个与门和一个或门实现。
By mastering these simple gates, you gain insight into how billions of transistors come together to execute programs and process data. It is, quite literally, the logic behind all logic.
通过掌握这些简单门电路，你能洞察数十亿晶体管如何组合在一起来执行程序和处理数据。毫不夸张地说，这就是所有逻辑背后的逻辑。
Published by TutorHao | IGCSE Computer Science Revision Series | aleveler.com
更多咨询请联系16621398022（同微信）
或截图后用「扫一扫 → 相册」选择本图