📚 The function of the six logic gates | 六种逻辑门的功能
Logic gates are fundamental components in digital electronics. In IGCSE Cambridge Science, you need to understand how six basic logic gates process binary signals. Each gate follows a specific logical rule, and by combining them, we can build complex circuits that power everything from calculators to computers. This article explains the function of AND, OR, NOT, NAND, NOR and XOR gates, with truth tables, Boolean expressions and real-world connections.
逻辑门是数字电子学中的基本元件。在 IGCSE 剑桥科学课程中，你需要理解六种基本逻辑门如何处理二进制信号。每种门都遵循特定的逻辑规则；将它们组合起来，我们就能构建出从计算器到计算机所用的复杂电路。本文将解释与门、或门、非门、与非门、或非门和异或门的功能，并配以真值表、布尔表达式和实际应用联系。
1. Introduction to Logic Gates | 逻辑门简介
A logic gate is a physical device or electronic circuit that takes one or more digital inputs and produces a single digital output. The inputs and output can only be in one of two states: logic 0 (LOW, usually 0 V) and logic 1 (HIGH, usually +5 V or +3.3 V). Each gate's behaviour is defined by a truth table, which lists all possible input combinations and the corresponding output.
逻辑门是一种物理器件或电子电路，它接受一个或多个数字输入并产生一个数字输出。输入和输出只能处于两种状态之一：逻辑 0（低电平，通常为 0 V）和逻辑 1（高电平，通常为 +5 V 或 +3.3 V）。每种门的行为都由真值表定义，真值表列出了所有可能的输入组合以及相应的输出。
There are six basic gates covered in the IGCSE syllabus. Three of them (AND, OR, NOT) are the simplest, while NAND and NOR are formed by combining an AND or OR with a NOT gate. The XOR gate is a special case that detects inequality between two inputs.
IGCSE 教学大纲涵盖六种基本门。其中三种（与门、或门、非门）最为简单，而与非门和或非门是通过将与门或或门与非门组合而成的。异或门是一种特殊情况，用于检测两个输入是否不相同。
2. The AND Gate | 与门
D gate, the Boolean expression is written as Q = A AND B or, in algebraic form, Q = A · B.
与门仅在所有输入均为高电平（1）时才输出高电平（1）。如果有任何一个输入为低电平（0），输出就为低电平。对于双输入与门，布尔表达式写作 Q = A AND B，或用代数形式写成 Q = A · B。
Q = A · B
The truth table below shows every input combination for a two-input AND gate.
下面的真值表显示了双输入与门的所有输入组合。
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
The AND operation is like a series connection in a circuit: current flows only if both switches are closed. In examinations, you may need to draw the standard AND gate symbol — a D-shaped block with two inputs on the left and one output on the right.
与运算类似于电路中的串联连接：只有两个开关都闭合时电流才能通过。在考试中，你可能需要画出标准的与门符号 — 一个 D 形轮廓，左边有两个输入端，右边有一个输出端。
3. The OR Gate | 或门
expression for a two-input OR gate is Q = A OR B, represented algebraically as Q = A + B.
或门只要至少有一个输入为高电平，输出就为高电平。只有当所有输入均为低电平时，输出才为低电平。双输入或门的布尔表达式是 Q = A OR B，代数表示为 Q = A + B。
Q = A + B
Note that the '+' sign here represents logical OR, not arithmetic addition.
请注意，这里的 '+' 号代表逻辑或，而不是算术加法。
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
The OR gate resembles a parallel connection: current flows if either switch is closed. The standard symbol is a curved shape that converges to a point on the right, with two inputs on the left.
或门类似于并联连接：只要任一开关闭合，电流就能通过。其标准符号是一个弯曲的形状，在右侧汇聚成一点，左侧有两个输入端。
4. The NOT Gate (Inverter) | 非门（反相器）
, and a LOW input gives a HIGH output. The Boolean expression is Q = NOT A, written as Q = ¬A or Q = A̅.
非门是最简单的逻辑门，因为它只有一个输入端。它将输入信号反相：高电平输入得到低电平输出，低电平输入得到高电平输出。其布尔表达式为 Q = NOT A，写作 Q = ¬A 或 Q = A̅。
Q = ¬A
| A | Q |
|---|---|
| 0 | 1 |
| 1 | 0 |
The NOT gate is often called an inverter. Its symbol is a triangle pointing right, followed by a small circle (bubble) at the output. The bubble indicates inversion. Whenever you see a bubble on any gate symbol, it means the output is inverted.
非门常被称为反相器。其符号是一个指向右方的三角形，输出端有一个小圆圈（泡泡）。这个小圆圈表示反相。无论你在任何门符号上看到小圆圈，都意味着该输出被反相了。
5. The NAND Gate | 与非门
e HIGH. For any other input combination, the output is HIGH. The Boolean expression is Q = ¬(A · B) — the complement of the AND result.
与非门由一个与门后接一个非门构成。它仅在所有输入均为高电平时才输出低电平；对于任何其他输入组合，输出均为高电平。布尔表达式为 Q = ¬(A · B) — 即与运算结果的补。
Q = ¬(A · B) or Q = (A · B)̅
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The NAND gate is called a universal gate because you can use multiple NAND gates to create any other logic function (AND, OR, NOT). Its symbol is an AND gate with a small circle at the output.
与非门被称为通用门，因为你可以使用多个与非门来实现任何其他逻辑功能（与、或、非）。其符号是在与门符号的输出端加上一个小圆圈。
6. The NOR Gate | 或非门
LOW. If at least one input is HIGH, the output becomes LOW. The Boolean expression is Q = ¬(A + B).
或非门由一个或门后接一个非门组合而成。它仅在所有输入均为低电平时输出高电平；如果至少有一个输入为高电平，输出就变为低电平。布尔表达式为 Q = ¬(A + B)。
Q = ¬(A + B) or Q = (A + B)̅
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
Like the NAND gate, the NOR gate is also a universal gate. Its standard symbol is an OR gate with a bubble on the output. In exam questions, you often see NOR gates used in latch circuits and memory elements.
与与非门一样，或非门也是一种通用门。它的标准符号是在或门符号的输出端加上一个圆圈。在考试题中，你经常会看到或非门用于锁存电路和存储单元中。
7. The XOR Gate (Exclusive OR) | 异或门
same (both 0 or both 1), the output is LOW. The Boolean expression can be written as Q = A ⊕ B, which means (A AND NOT B) OR (NOT A AND B).
异或门与基本的或门不同，因为它只在两个输入不同时才输出高电平。如果两个输入相同（同时为 0 或同时为 1），输出则为低电平。布尔表达式可以写作 Q = A ⊕ B，这表示 (A AND NOT B) OR (NOT A AND B)。
Q = A ⊕ B = A · ¬B + ¬A · B
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The XOR gate is widely used in arithmetic circuits, such as half adders and parity checkers. Its symbol is similar to an OR gate but has an extra curved line on the input side.
异或门广泛用于算术电路，如半加器和奇偶校验器。其符号类似于或门，但在输入端一侧多了一条弯曲的弧线。
8. Truth Tables and Boolean Expressions Summary | 真值表与布尔表达式总结
To help you compare the six gates quickly, the following table summarises their Boolean expressions and the output logic rule.
为了帮助您快速比较这六种门，下表总结了它们的布尔表达式和输出逻辑规则。
| Gate | Boolean Expression | Output HIGH when... |
|---|---|---|
| AND | Q = A · B | Both inputs are 1 |
| OR | Q = A + B | At least one input is 1 |
| NOT | Q = ¬A | Input is 0 |
| NAND | Q = ¬(A · B) | Any input is 0 |
| NOR | Q = ¬(A + B) | All inputs are 0 |
| XOR | Q = A ⊕ B | Inputs are different |
When constructing truth tables yourself, always list input combinations in binary counting order (00, 01, 10, 11) to avoid missing rows. For each row, apply the logical rule to determine Q.
当自己构建真值表时，务必按二进制计数顺序（00, 01, 10, 11）列出输入组合，以免漏掉任何一行。对每一行应用逻辑规则来确定 Q。
9. Combining Gates to Create Logic Circuits | 组合逻辑门创建逻辑电路
In real systems, gates are connected together to perform complex decision-making. A simple example is creating a NAND function using an AND gate followed by a NOT gate, as described earlier. Another common circuit is the half adder, which adds two single binary digits and produces a Sum and a Carry output.
在实际系统中，逻辑门被连接在一起以执行复杂的决策。一个简单的例子是使用与门后接非门来实现与非功能，如有前文所述。另一个常见电路是半加器，它将两个单位二进制数字相加，产生“和” (Sum) 与“进位” (Carry) 输出。
The half adder uses an XOR gate for Sum (S = A ⊕ B) and an AND gate for Carry (C = A · B). The truth table for a half adder is:
半加器使用异或门产生和 (S = A ⊕ B)，使用与门产生进位 (C = A · B)。半加器的真值表如下：
| A | B | Sum (S) | Carry (C) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
Being able to analyse a combination of gates is an essential exam skill. Work through the circuit gate by gate, and fill in the intermediate outputs before reaching the final Q.
能够分析组合逻辑门电路是一项重要的考试技能。要按门逐级分析，先填好中间输出值，再求得最终的 Q。
10. Practical Applications of Logic Gates | 逻辑
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