📚 AS Cambridge Computer Science: Unit Test Mock Paper Analysis | AS剑桥计算机：单元测试模拟卷解析
This article provides a step-by-step walkthrough of a typical AS Cambridge Computer Science unit test. Each question is dissected to highlight key concepts, common pitfalls, and examiner expectations, helping you to consolidate your understanding and improve exam technique.
本文逐步解析一套典型的AS剑桥计算机科学单元测试模拟卷。每一道题都经过拆解，突出核心概念、常见错误和阅卷要求，帮助你巩固理解并提升应试技巧。
1. Number Systems and Conversions | 数制与转换
The first question often tests your ability to convert between decimal, binary, octal, and hexadecimal. Consider converting the decimal integer 156 into its binary, octal, and hexadecimal equivalents, then converting the hexadecimal A3F into decimal.
第一题通常会考查在不同数制间转换的能力。例如，将十进制数 156 转换为二进制、八进制和十六进制，再将十六进制数 A3F 转换为十进制。
- Decimal 156 to binary: 1, 4 ÷ 2 = 2 r0, 2 ÷ 2 = 1 r0, 1 ÷ 2 = 0 r1. Reading remainders backwards gives 10011100₂.
- 十进制156转二进制：156 ÷ 2 = 78 余 0，78 ÷ 2 = 39 余 0，39 ÷ 2 = 19 余 1，19 ÷ 2 = 9 余 1，9 ÷ 2 = 4 余 1，4 ÷ 2 = 2 余 0，2 ÷ 2 = 1 余 0，1 ÷ 2 = 0 余 1。反向读取余数得到 10011100₂。
- Binary to octal: group the binary digits into threes from the right: 10 011 100 → 2 3 4₈.
- 二进制转八进制：从右起每三位一组：10 011 100 → 2 3 4₈。
- Binary to hexadecimal: group into fours: 1001 1100 → 9 C₁₆.
- 二进制转十六进制：每四位一组：1001 1100 → 9 C₁₆。
- Hexadecimal A3F to decimal: A=10, 3=3, F=15; (10 × 16²) + (3 × 16¹) + (15 × 16⁰) = 2560 + 48 + 15 = 2623₁₀.
- 十六进制A3F转十进制：A=10, F=15；(10×16²)+(3×16¹)+(15×16⁰)=2560+48+15=2623₁₀。
Always show your working – method marks are often awarded even if the final answer contains a small slip. In binary conversions, double-check the grouping of bits for octal and hexadecimal.
务必展示计算过程——即使最终答案有微小错误，步骤分也常会给出。在二进制转换中，要仔细核对八进制和十六进制的位分组。
2. Two's Complement Addition and Overflow | 补码加法与溢出
Using an 8‑bit two's complement representation, calculate the sum of −65 and −42. Indicate whether overflow occurs and explain why.
采用8位二进制补码表示，计算 −65 与 −42 的和。说明是否发生溢出并解释原因。
Step 1: Represent −65 in two's complement. Positive 65 = 01000001₂. Invert bits → 10111110, add 1 → 10111111₂.
Step 2: Represent −42. +42 = 00101010₂, invert → 11010101, add 1 → 11010110₂.
Step 3: Add the two values:
步骤1：写出−65的补码。+65 = 01000001₂，按位取反→10111110，加1→10111111₂。
步骤2：−42：+42=00101010₂，取反→11010101，加1→11010110₂。
步骤3：两数相加：
10111111
+ 11010110
= 110010101
With 8‑ 10010101₂. The carry into bit 7 (sign bit) is 1, carry out of bit 7 is also 1. Since carry‑in equals carry‑t, no overflow occurs. The result, 10010101₂, is negative; to find its magnitude, take two' 1101010, add 1 → 01101011₂ = 107₁₀, so the result is −107, which is correct for −65 + −42.
8位存储只保留低8位：10010101₂。第7位（符号位）的进位为1，第7位的出进位也为1。由于进出进位相等，没有溢出。结果10010101₂为负数；求其绝对值可取补码：取反→01101010，加1→01101011₂ = 107₁₀，因此结果为−107，与−65 + −42一致。
Overflow in two's complement occurs when the carry into the sign bit differs from the carry out. Here they match, confirming the sum fits within the 8‑bit range (−128 to +127).
补码加法中，当进入符号位的进位与出符号位的进位不同时，发生溢出。这里二者相同，证明结果仍在8位补码范围内（−128 到 +127）。
3. Logic Gates and Boolean Expressions | 逻辑门与布尔表达式
A logic circuit consists of an AND gate whose inputs are A and the output of a NOR gate; the NOR gate receives B and C. Derive the Boolean expression and complete the truth table for output X.
某逻辑电路由一个与门和一个或非门构成：与门输入为 A 以及一个或非门的输出；或非门的输入为 B 和 C。写出输出 X 的布尔表达式并完成真值表。
Expression: NOR output = (B + C)‾; X = A AND (B + C)‾ → X = A · (B + C)‾.
表达式：或非门输出 = (B + C)‾；X = A AND (B + C)‾ → X = A · (B + C)‾。
Truth Table:
真值表：
| A | B | C | (B+C)‾ | X |
|---|---|---|---|---|
| 0 | 0 | 0 | 1 | 0 |
| 0 | 0 | 1 | 0 | 0 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 | 0 |
| 1 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 0 | 0 |
| 1 | 1 | 0 | 0 | 0 |
| 1 | 1 | 1 | 0 | 0 |
we observe that X is 1 only when A = 1 and both B and C are 0. In Boolean terms, X = A · B · C .
由真值表可见，仅当 A = 1 且 B 和 C 同时为 0 时 X 才为 1。布尔表达式可简化为 X = A · B · C 。
When simplifying, note that (B + C)‾ is equivalent to B · C by De Morgan's law. Thus the entire expression reduces directly to A · B · C , which matches the truth table and uses fewer gates.
简化时要注意，根据德·摩根定律 (B + C)‾ 等价于 B · C ，所以整个表达式可简化为 A · B · C ，既符合真值表又节省了门电路。
4. Basic Assembly Language Instructions | 基础汇编语言指令
Explain the function of the following assembly instructions in the Cambridge 9618 assembler: LDA, STA, ADD, OUT. Then trace the execution of this snippet, assuming the accumulator starts at zero.
解释 Cambridge 9618 汇编器中下列指令的功能：LDA、STA、ADD、OUT。然后跟踪下面代码段的执行，假设累加器初始值为零。
LDA num1 ADD num2 STA result OUT HLT num1: 5 num2: 7 result: 0
- LDA: Loads the value from a memory address into the accumulator.
- LDA：将内存地址中的数值加载到累加器。
- STA: Stores the content of the accumulator into a specified memory address.
- STA：将累加器中的内容存入指定的内存地址。
- ADD: Adds the value from a memory address to the accumulator, leaving the result in the accumulator.
- ADD：将内存地址中的数值与累加器相加，结果保留在累加器中。
- OUT: Sends the accumulator's value to an output device (typically displayed on screen).
- OUT：将累加器中的值输出到外设（通常显示在屏幕上）。
Trace: LDA num1 → ACC = 5. ADD num2 → ACC = 5 + 7 = 12. STA result → stores 12 at address 'result'. OUT → outputs 12. HLT stops execution. The program therefore displays 12.
跟踪：LDA num1 → ACC = 5。ADD num2 → ACC = 5+7=12。STA result → 将12存入 'result' 地址。OUT → 输出12。HLT 停止执行。所以程序显示 12。
Understanding these basic mnemonics is essential for tackling the typical 'register transfer' and 'fetch‑decode‑execute' questions that appear on Paper 1. Always note that the accumulator is the implicit destination for arithmetic operations.
理解这些基本助记符对于解答试卷中常见的“寄存器传送”和“取指‑译码‑执行”类题目至关重要。始终记住累加器是算术运算的隐式目的地。
5. Processor Components and the FDE Cycle | 处理器组件与取指‑译码‑执行周期
Describe the roles of the Program Counter (PC), Memory Address Register (MAR), and Memory Data Register (MDR) during the fetch phase of the instruction cycle.
描述程序计数器(PC)、内存地址寄存器(MAR)和内存数据寄存器(MDR)在指令周期取指阶段的作用。
Program Counter (PC): Holds the address of the next instruction to be fetched. At the start of the fetch phase, the content of the PC is copied into the MAR.
程序计数器(PC)：保存下一条待取指令的地址。取指阶段开始时，PC的内容被复制到 MAR。
Memory Address Register (MAR): Receives the address from the PC and sends it along the address bus to main memory, enabling the correct instruction to be located.
内存地址寄存器(MAR)：从 PC 接收地址，通过地址总线将其发送到内存，从而定位正确的指令。
Memory Data Register (MDR): Acts as a buffer for the instruction word fetched from memory. The contents of the addressed memory location travel via the data bus into the MDR, from where the instruction is transferred to the Current Instruction Register (CIR) for decoding.
内存数据寄存器(MDR)：充当从内存取出的指令字的缓冲器。被寻址的内存单元内容经数据总线进入 MDR，然后指令被传送到当前指令寄存器(CIR)进行译码。
After the fetch, the PC is incremented by one (or by an offset depending on instruction size) so that it points to the next instruction in sequence, unless a jump occurs.
取指后，PC 自动加1（或根据指令长度增加相应偏移），使其指向下一条顺序指令，除非发生跳转。
the fetch stage. Always remember: PC → MAR → address bus → memory → data bus → MDR → CIR.
考试中经常要求你按正确的数据流动顺序列出寄存器。请始终记住：PC → MAR → 地址总线 → 内存 → 数据总线 → MDR → CIR。
6. IPv4 Addressing and Subnet Masking | IPv4地址与子网掩码
Given the IP address 192.168.10.77 with subnet mask 255.255.255.240, determine the network address, the number of usable host addresses, and the broadcast address for the subnet.
给定 IP 地址 192.168.10.77，子网掩码 255.255.255.240，求网络地址、可用主机地址数量以及该子网的广播地址。
Convert the last octet to binary: 77₁₀ = 01001101₂; mask last octet 240₁₀ = 11110000₂.
Network address: portion. 01001101 AND 11110000 = 01000000₂ = 64₁₀. Thus network address is 192.168.10.64.
将最后一个字节转换为二进制：77₁₀ = 01001101₂；子网掩码末字节 240₁₀ = 11110000₂。
网络地址：主机部分按位与运算。01001101 AND 11110000 = 01000000₂ = 64₁₀。因此网络地址为 192.168.10.64。
tal addresses = 2⁴ = 16. Subtract 2 for network and broadcast addresses → 14 usable hosts.
主机位数为 4（掩码 240 在末字节占用4位网络位）。总地址数 = 2⁴ = 16。减去网络地址和广播地址，得到14个可用主机。
Broadcast address: set all host bits to 1: 01001111₂ = 79₁₀, giving 192.168.10.79.
广播地址：将所有主机位置1：01001111₂ = 79₁₀，即 192.168.10.79。
here n = number of host bits) must be applied to all subnets unless specifically exempted.
学生在计算可用主机数时经常忘记扣除网络地址和广播地址。除非题目特别豁免，否则所有子网都需应用公式 2ⁿ − 2（n = 主机位数）。
7. Data Compression: Run-Length Encoding | 数据压缩：游程编码
A bitmap image uses the palette: W for white, B for black, R for red. The pixel row 'WWWWBWWWRRRR' is to be compressed using run‑length encoding (RLE). Show the compressed output.
某位图使用调色板：W代表白，B代表黑，R代表红。像素行“WWWWBWWWRRRR”要采用游程编码(RLE)进行压缩。写出压缩后的输出。
RLE replaces consecutive identical symbols with a count followed by the symbol. The sequence 'WWWW' becomes '4W'; 'B' stays '1B'; 'WWW' becomes '3W'; 'RRRR' becomes '4R'. Concatenating gives 4W1B3W4R.
RLE 将连续相同符号替换为一个计数值加上该符号。序列“WWWW”变为“4W”；“B”变为“1B”；“WWW”变为“3W”；“RRRR”变为“4R”。连接后得到 4W1B3W4R。
le example illustrates why RLE works well on graphics with large solid areas but is ineffective on detailed, noisy images.
压缩比可通过原始大小（12个字符）除以压缩后大小（8个字符）计算，即12/8 = 1.5:1。这个简单示例说明了 RLE 对于有大面积纯色的图形效果良好，但在细节丰富、噪声多的图像上则效率低下。
In exam answers, ensure you use the exact format prescribed (count before symbol, no separators) and note that the count may itself require a fixed number of bits in practical implementations.
在考试答案中，请确保使用规定的格式（计数在前、符号在后，无分隔符），并注意在实际实现中计数值本身可能需要固定位数。
8. Symmetric Encryption and Caesar Cipher | 对称加密与凯撒密码
Encrypt the plaintext "HELLO" using a Caesar cipher with a shift of 3. Then discuss one major weakness of symmetric encryption.
使用移位为3的凯撒密码加密明文“HELLO”。然后讨论对称加密的一个主要弱点。
Encryption: ions in the alphabet (wrapping around Z→A): H → K, E → H, L → O, L → O, O → R. Ciphertext: KHOOR.
加密：每个字母在字母表中向前移3位（Z之后回到A）：H→K，E→H，L→O，L→O，O→R。密文：KHOOR。
Weakness: Symmetric encryption uses the same key for encryption and decryption. The greatest challenge lies in secure key distribution: if the key is intercepted during transmission, an attacker can decrypt all subsequent messages. Caesar cipher is also trivially broken by brute force because there are only 25 possible keys.
弱点：对称加密使用相同密钥进行加密和解密。最大的挑战在于安全的密钥分发：如果密钥在传输中被截获，攻击者就能解密所有后续信息。凯撒密码仅有25种可能的密钥，极容易被穷举攻击破解。
While modern symmetric ciphers like AES are computationally secure, the key distribution problem remains. This is why hybrid systems combining asymmetric (public‑key) encryption for key exchange with symmetric encryption for bulk data have become standard in protocols such as TLS.
尽管 AES 等现代对称密码在计算上是安全的，但密钥分发问题依然存在。这就是为什么结合非对称（公钥）加密进行密钥交换、对称加密进行批量数据的混合系统已成为 TLS 等协议的标准。
9. Ethical and Legal Considerations | 道德与法律考量
A software developer discovers a security flaw in an online banking application. Outline the ethical responsibilities the developer should consider before disclosing the vulnerability.
某软件开发者发现某网上银行应用程序存在安全漏洞。概述开发者在公开该漏洞前应考虑的道德责任。
- Responsible disclosure: The developer should immediately inform the bank's security team privately, giving them a reasonable time to patch the flaw before any public announcement. This minimises the risk of malicious exploitation.
- 负责任的信息公开：开发者应立即私下通知银行的安全团队，给予合理时间修复漏洞，然后再公开发布。这能最大限度降低被恶意利用的风险。
- Respect for intellectual property: Reverse engineering or probing the application must comply with the Computer Misuse Act and the terms of service. Unauthorised access, even for 'testing', may breach the law.
- 尊重知识产权：对应用程序进行逆向工程或探测必须遵守《计算机滥用法》和服务条款。未经授权的访问，即使出于“测试”目的，也可能触犯法律。
- Public interest vs. panic: If the bank fails to act, the developer may consider alerting a regulatory body to protect consumers. However, full public disclosure without coordination could cause mass panic and worsen harm.
- 公共利益与恐慌：如果银行不作为，开发者可考虑报告监管机构以保护消费者。但未经协调的全面公开可能引发公众恐慌，加剧损害。
- Data privacy: The developer must not copy, store, or share any customer data glimpsed during the discovery process. Such data must be treated as confidential.
- 数据隐私：开发者不得复制、存储或分享在发现过程中看到的任何客户数据。此类数据应视为机密信息。
Ethical behavior in computing goes beyond legal compliance; it requires a proactive commitment to minimising harm, respecting stakeholders, and promoting trust in digital systems.
计算机领域的道德行为不仅限于遵守法律；它要求主动致力于减少危害、尊重利益相关方，并提升对数字系统的信任。
10. Operating System Functions: Multitasking and Memory Management | 操作系统功能：多任务与内存管理
Explain how a modern operating system manages multitasking and virtual memory, making reference to process scheduling and paging.
解释现代操作系统如何管理多任务和虚拟内存，并提及进程调度和分页。
Multitasking: The OS uses a process scheduler to allocate CPU time slices to processes. It maintains a process control block (PCB) for each process containing its state, program counter, and register values. Context switching saves the state of the current process and loads the next, creating the illusion of parallelism on a single core.
多任务：操作系统使用进程调度器为各进程分配CPU时间片。它为每个进程维护一个进程控制块(PCB)，内含进程状态、程序计数器和寄存器值。上下文切换保存当前进程状态并加载下一进程，从而在单核上营造并行处理的假象。
Virtual memory and paging: Programs are divided into fixed‑size blocks called pages. Their logical addresses are mapped to physical frames in RAM via a page table. When a required page is not in RAM (a page fault), the OS swaps it in from secondary storage, possibly moving an idle page out (demand paging). This allows execution of programs larger than physical memory and provides memory isolation between processes.
虚拟内存与分页：程序被分割为固定大小的块，称为页。其逻辑地址通过页表映射到RAM中的物理帧。当所需页面不在内存时（缺页错误），操作系统从外存调入该页，并可能调出一页闲置页面（请求调页）。这使得运行的程序可以大于物理内存，并实现进程间的内存隔离。
Together, multitasking and virtual memory are fundamental to the responsive, multi‑user environments we expect from modern desktops and smartphones. Examiners expect you to use correct terminology such as 'time slice', 'context switch', 'page table', and 'page fault'.
多任务和虚拟内存共同构成了现代桌面和智能手机响应灵敏、多用户环境的基础。阅卷人希望看到准确术语，如“时间片”、“上下文切换”、“页表”和“缺页错误”。
Published by TutorHao | AS Computer Science Revision Series | aleveler.com
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