📚 GCSE Computer Science: Logic Gates Revision Guide | GCSE 计算机：逻辑门考点精讲
Logic gates are fundamental to understanding how computers process information at the hardware level. In GCSE Computer Science, you need to be able to identify, draw, and use truth tables for the basic logic gates (AND, OR, NOT) as well as derived gates (NAND, NOR, XOR, XNOR). This revision guide covers all the key concepts, Boolean expressions, circuit diagrams, and simplification techniques you'll need for the exam.
逻辑门是了解计算机如何在硬件层面处理信息的基础。在GCSE计算机科学中，你需要能够识别、绘制基本逻辑门（与、或、非）以及衍生门（与非、或非、异或、同或）的真值表并使用它们。本考点精讲涵盖了所有关键概念、布尔表达式、电路图和简化技巧，帮助你备战考试。
1. Introduction to Logic Gates | 逻辑门简介
Logic gates take one or more binary inputs (0 or 1) and produce a single binary output according to a fixed rule. The input and output values are represented by two voltage levels, often called LOW (0) and HIGH (1).
逻辑门接受一个或多个二进制输入（0 或 1），并根据固定规则产生单个二进制输出。输入与输出值由两种电压电平表示，通常称为低电平 (0) 和高电平 (1)。
The behaviour of a logic gate can be completely described by a truth table, which lists all possible input combinations and the corresponding output. Boolean algebra is the mathematical notation used to express and manipulate these logic functions.
逻辑门的行为可以用真值表完整描述，真值表列出所有可能的输入组合及其对应的输出。布尔代数是用于表达和操作这些逻辑函数的数学记号。
At GCSE level, you will work mainly with gates that have one or two inputs. The main gates you must know are AND, OR, NOT, NAND, NOR, XOR, and XNOR.
在GCSE阶段，你将主要处理带有一个或两个输入的逻辑门。你必须掌握的主要门类有：与门(AND)、或门(OR)、非门(NOT)、与非门(NAND)、或非门(NOR)、异或门(XOR)和同或门(XNOR)。
2. Basic Logic Gates: AND, OR, NOT | 基本逻辑门：与门、或门、非门
The AND gate outputs 1 only when all its inputs are 1. For a 2‑input AND gate, the output Q equals A AND B.
与门（AND）只有在所有输入都为 1 时才输出 1。对于二输入与门，输出 Q 等于 A 与 B。
r simply Q = AB. The dot symbol or simple concatenation represents logical multiplication.
与运算的布尔表达式写作 Q = A · B 或简写为 Q = AB。点号或直接并列表示逻辑乘法。
The OR gate outputs 1 if at least one input is 1. For a 2‑ = A OR B. Its Boolean expression is Q = A + B, where the plus sign means logical addition.
或门（OR）只要至少有一个输入为 1，输出就为 1。对于二输入或门，Q = A 或 B。其布尔表达式为 Q = A + B，加号表示逻辑加法。
The NOT gate (inverter) has a single input and outputs the opposite logic level. If A is 0, Q is 1; if A is 1, Q is 0.
非门（NOT，反相器）只有一个输入，输出与输入逻辑相反。若 A 为 0，则 Q 为 1；若 A 为 1，则 Q 为 0。
The NOT operation is denoted by a bar over the variable or a prime symbol: Q = ¬A or Q = A'. In GCSE both notations are accepted, but ¬A or A' are the most common.
非运算用变量上加横线或撇号表示：Q = ¬A 或 Q = A'。在GCSE中两种记号均可，但 ¬A 或 A' 更为常见。
3. Universal Gates: NAND and NOR | 通用门：与非门和或非门
utputs 0 only when all inputs are 1; otherwise it outputs 1. Its Boolean expression is Q = ¬(A · B) or Q = A NAND B.
与非门（NAND）是与门的反相。只有当所有输入都为 1 时输出 0；否则输出 1。其布尔表达式为 Q = ¬(A · B) 或 Q = A NAND B。
utputs 1 only when all inputs are 0; otherwise it outputs 0. The Boolean expression is Q = ¬(A + B) or Q = A NOR B.
或非门（NOR）仅在所有输入都为 0 时输出 1；否则输出 0。布尔表达式为 Q = ¬(A + B) 或 Q = A NOR B。
NAND and NOR gates are called universal gates because any other logic function can be implemented using only NAND gates or only NOR gates. This property is often exploited in circuit design to reduce the number of different chip types needed.
与非门和或非门被称为通用门，因为仅用与非门或仅用或非门就能实现任何其他逻辑功能。这一特性常用于电路设计，以减少所需的不同芯片类型。
4. Exclusive-OR (XOR) Gate | 异或门 (XOR)
The XOR (exclusive‑ = 1 exactly when A ≠ B. It is often used in arithmetic circuits for adding binary digits.
异或门（XOR）在输入中 1 的个数为奇数时输出 1。对于两个输入，当 A ≠ B 时 Q 恰好为 1。它常用于算术电路中二进制数字的加法。
The Boolean expression for a 2‑input XOR is Q = A ⊕ B, which can be written in terms of basic gates as Q = (A · ¬B) + (¬A · B).
二输入异或门的布尔表达式为 Q = A ⊕ B，用基本门可表示为 Q = (A · ¬B) + (¬A · B)。
5. Exclusive-NOR (XNOR) Gate | 同或门 (XNOR)
wo inputs, it is the inverse of the XOR gate and is sometimes called the equivalence gate.
同或门（XNOR）当两个输入相同时输出 1，即 A = B。对于两个输入，它是异或门的反相，有时称为等价门。
Its Boolean expression is Q = A ⊙ B, which is equivalent to Q = ¬(A ⊕ B) or Q = (A · B) + (¬A · ¬B).
其布尔表达式为 Q = A ⊙ B，等效于 Q = ¬(A ⊕ B) 或 Q = (A · B) + (¬A · ¬B)。
6. Truth Tables | 真值表
A truth table shows every possible input combination and the resulting output for a logic gate or circuit. The leftmost columns list the inputs, and the rightmost column gives the output. Each row represents one input state.
真值表显示了逻辑门或电路所有可能的输入组合及其对应的输出。最左列列出输入，最右列给出输出。每一行代表一种输入状态。
Below are the truth tables for the basic and derived 2‑input gates, plus the NOT gate which has a single input. In all tables, 1 represents TRUE/HIGH and 0 represents FALSE/LOW.
以下是基本和衍生二输入门以及单输入非门的真值表。在所有表格中，1 代表真/高电平，0 代表假/低电平。
The AND gate (Q = A·B):
与门 (Q = A·B)：
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
The OR gate (Q = A+B):
或门 (Q = A+B)：
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
The NOT gate (Q = ¬A):
非门 (Q = ¬A)：
| A | Q |
|---|---|
| 0 | 1 |
| 1 | 0 |
The NAND gate (Q = ¬(A·B)):
与非门 (Q = ¬(A·B))：
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The NOR gate (Q = ¬(A+B)):
或非门 (Q = ¬(A+B))：
| A | B | Q |
|---|
